Resource efficient LDPC decoders : from algorithms to hardware architectures /: from algorithms to hardware architectures. (2017)

• Record Type: Book
• Further Information: Note: Vikram A. Chandrasetty.
• Authors: Chandrasetty, Vikram Arkalgud; Aziz, Sayed Mahfuzul
• Contents: 1.Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. LDPC decoder architectures 6. Hardware implementation of LDPC decoder 7. LDPC decoders in multimedia communication References 8. Prospective LDPC applications Appendix-A : Sample C-Programs and MATLAB models for LDPC code construction and simulation Appendix-B : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architecture Appendix-C : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture
• Publisher Details: Amsterdam : Academic Press
• Publication Date: 2017
• Extent: 1 online resource
• Subjects: 005.717; Error-correcting codes (Information theory); Coding theory
• Languages: English
• ISBNs: 9780128112564
• Related ISBNs: 9780128112557
• Notes: Note: Description based on CIP data; resource not viewed.
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.