Essentials of Computer Architecture. (2017)

• Record Type: Book
• Other Names: Comer, Douglas
• Contents: Cover; Half Title; Title Page; Copyright Page; Dedication; Contents; Preface; Chapter 1 Introduction And Overview; 1.1 The Importance Of Architecture; 1.2 Learning The Essentials; 1.3 Organization Of The Text; 1.4 What We Will Omit; 1.5 Terminology: Architecture And Design; 1.6 Summary; PART I: Basics; Chapter 2 Fundamentals Of Digital Logic; 2.1 Introduction; 2.2 Digital Computing Mechanisms; 2.3 Electrical Terminology: Voltage And Current; 2.4 The Transistor; 2.5 Logic Gates; 2.6 Implementation Of A Nand Logic Gate Using Transistors; 2.7 Symbols Used For Logic Gates. 2.8 Example Interconnection Of Gates2.9 A Digital Circuit For Binary Addition; 2.10 Multiple Gates Per Integrated Circuit; 2.11 The Need For More Than Combinatorial Circuits; 2.12 Circuits That Maintain State; 2.13 Propagation Delay; 2.14 Using Latches To Create A Memory; 2.15 Flip-Flops And Transition Diagrams; 2.16 Binary Counters; 2.17 Clocks And Sequences; 2.18 The Important Concept Of Feedback; 2.19 Starting A Sequence; 2.20 Iteration In Software Vs. Replication In Hardware; 2.21 Gate And Chip Minimization; 2.22 Using Spare Gates; 2.23 Power Distribution And Heat Dissipation. 2.24 Timing And Clock Zones2.25 Clockless Logic; 2.26 Circuit Size And Moore's Law; 2.27 Circuit Boards And Layers; 2.28 Levels Of Abstraction; 2.29 Summary; Chapter 3 Data And Program Representation; 3.1 Introduction; 3.2 Digital Logic And The Importance Of Abstraction; 3.3 Definitions Of Bit And Byte; 3.4 Byte Size And Possible Values; 3.5 Binary Weighted Positional Representation; 3.6 Bit Ordering; 3.7 Hexadecimal Notation; 3.8 Notation For Hexadecimal And Binary Constants; 3.9 Character Sets; 3.10 Unicode; 3.11 Unsigned Integers, Overflow, And Underflow; 3.12 Numbering Bits And Bytes. 3.13 Signed Binary Integers3.14 An Example Of Two's Complement Numbers; 3.15 Sign Extension; 3.16 Floating Point; 3.17 Range Of IEEE Floating Point Values; 3.18 Special Values; 3.19 Binary Coded Decimal Representation; 3.20 Signed, Fractional, And Packed BCD Representations; 3.21 Data Aggregates; 3.22 Program Representation; 3.23 Summary; PART II: Processors; Chapter 4 The Variety Of Processors And Computational Engines; 4.1 Introduction; 4.2 The Two Basic Architectural Approaches; 4.3 The Harvard And Von Neumann Architectures; 4.4 Definition Of A Processor; 4.5 The Range Of Processors. 4.6 Hierarchical Structure And Computational Engines4.7 Structure Of A Conventional Processor; 4.8 Processor Categories And Roles; 4.9 Processor Technologies; 4.10 Stored Programs; 4.11 The Fetch-Execute Cycle; 4.12 Program Translation; 4.13 Clock Rate And Instruction Rate; 4.14 Control: Getting Started And Stopping; 4.15 Starting The Fetch-Execute Cycle; 4.16 Summary; Chapter 5 Processor Types And Instruction Sets; 5.1 Introduction; 5.2 Mathematical Power, Convenience, And Cost; 5.3 Instruction Set Architecture; 5.4 Opcodes, Operands, And Results; 5.5 Typical Instruction Format.
• Publisher Details: Boca Raton, UNITED STATES : Chapman and Hall/CRC
• Publication Date: 2017
• Extent: 1 online resource (536), illustrations (black and white)
• Subjects: 004.2; MATHEMATICS / General; Computer architecture; COMPUTERS / Programming Languages / General; Electronic books
• Languages: English
• ISBNs: 1351849611; 9781351849616
• Related ISBNs: 1138626597; 135184959X; 1351849603; 131522626X
• Notes: Note: Print version record.
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.