Operating system design : the Xinu approach /: the Xinu approach. (2015)

• Record Type: Book
• Further Information: Note: Douglas Comer.
• Authors: Comer, Douglas; Comer, Douglas
• Contents: Introduction and Overview; Operating Systems; Approach Used In The Text; A Hierarchical Design; The Xinu Operating System; What An Operating System Is Not; An Operating System Viewed From The Outside; Remainder Of The Text; ; Concurrent Execution and Operating System Services; Programming Models For Multiple Activities; Operating System Services; Concurrent Processing Concepts And Terminology; Distinction Between Sequential And Concurrent Programs; Multiple Processes Sharing A Single Piece Of Code; Process Exit And Process Termination; Shared Memory, Race Conditions, And Synchronization; Semaphores And Mutual Exclusion; Type Names Used In Xinu; Operating System Debugging With Kputc And Kprintf; ; An Overview of the Hardware and Run-Time Environment; Physical And Logical Organizations Of The E2100L; Processor Organization And Registers; Bus Operation: The Fetch-Store Paradigm; Direct Memory Access; The Bus Address Space; Contents Of Kernel Segments KSEG0 and KSEG1; Bus Startup Static Configuration; Calling Conventions And The Run-Time Stack; Interrupts And Interrupt Processing; Exception Processing; Timer Hardware; Serial Communication; Polled vs. Interrupt-Driven I/O; Memory Cache And KSEG1; Storage Layout; Memory Protection; ; List and Queue Manipulation; A Unified Structure For Linked Lists Of Processes; A Compact List Data Structure; Implementation Of The Queue Data Structure; Inline Queue Manipulation Functions; Basic Functions To Extract A Process From A List; FIFO Queue Manipulation; Manipulation Of Priority Queues; List Initialization; ; Scheduling and Context Switching; The Process Table; Process States; Ready And Current States; A Scheduling Policy; Implementation Of Scheduling; Implementation Of Context Switching; State Saved In Memory; Context Switch On A MIPS Processor; An Address At Which To Restart A Process; Concurrent Execution And A Null Process; Making A Process Ready And The Scheduling Invariant; Deferred Rescheduling; Other Process Scheduling Algorithms; ; More Process Management; Process Suspension And Resumption; Self-Suspension And Information Hiding; The Concept Of A System Call; Interrupt Control With Disable And Restore; A System Call Template; System Call Return Values SYSERR And OK; Implementation Of Suspend; Suspending The Current Process; Suspend Return Value; Process Termination And Process Exit; Process Creation; Other Process Manager Functions; ; Coordination of Concurrent Processes; The Need For Synchronization; A Conceptual View Of Counting Semaphores; Avoidance Of Busy Waiting; Semaphore Policy And Process Selection; The Waiting State; Semaphore Data Structures; The Wait System Call; The Signal System Call; Static And Dynamic Semaphore Allocation; Example Implementation Of Dynamic Semaphores; Semaphore Deletion; Semaphore Reset; Coordination Across Parallel Processors (Multicore); ; Message Passing; Two Types Of Message Passing Services; Limits On Resources Used By Messages; Message Passing Functions And State Transitions; Implementation Of Send; Implementation Of Receive; Implementation Of Non-Blocking Message Reception; ; Basic Memory Management; Types Of Memory; Definition Of A Heavyweight Process; Memory Management In A Small Embedded System; Program Segments And Regions Of Memory; Dynamic Memory Allocation In An Embedded System; Design Of The Low-Level Memory Manager; Allocation Strategy And Memory Persistence; Keeping Track Of Free Memory; Implementation Of Low-Level Memory Management; Allocating Heap Storage; Allocating Stack Storage; Releasing Heap And Stack Storage; ; High-Level Memory Management and Virtual Memory; Partitioned Space Allocation; Buffer Pools; Allocating A Buffer; Returning Buffers To The Buffer Pool; Creating A Buffer Pool; Initializing The Buffer Pool Table; Virtual Memory And Memory Multiplexing; Real And Virtual Address Spaces; Hardware For Demand Paging; Address Translation With A Page Table; Metadata In A Page Table Entry; Demand Paging And Design Questions; Page Replacement And Global Clock; ; High-Level Message Passing; Inter-Process Communication Ports; The Implementation Of Ports; Port Table Initialization; Port Creation; Sending A Message To A Port; Receiving A Message From A Port; Port Deletion And Reset; ; Interrupt Processing; The Advantage Of Interrupts; Interrupt Dispatching; Vectored Interrupts; Assignment Of Interrupt Vector Numbers; Interrupt Hardware; IRQ Limits And Interrupt Multiplexing; Interrupt Software And Dispatching; The Lowest Level Of The Interrupt Dispatcher; The High-Level Interrupt Dispatcher; Disabling Interrupts; Constraints On Functions That Interrupt Code Invokes; The Need To Reschedule During An Interrupt; Rescheduling During An Interrupt; ; Real-Time Clock Management; Timed Events; Real-Time Clocks And Timer Hardware; Handling Real-Time Clock Interrupts; Delay And Preemption; Emulating A Real-Time Clock With A Timer; Implementation Of Preemption; Efficient Management Of Delay With A Delta List; Delta List Implementation; Putting A Process To Sleep; Timed Message Reception; Awakening Sleeping Processes; Clock Interrupt Processing; Clock Initialization; Interval Timer Management; ; Device-Independent Input and Output; Conceptual Organization Of I/O And Device Drivers; Interface And Driver Abstractions; An Example I/O Interface; The Open-Read-Write-Close Paradigm; Bindings For I/O Operations And Device Names; Device Names In Xinu; The Concept Of A Device Switch Table; Multiple Copies Of A Device And Shared Drivers; The Implementation Of High-Level I/O Operations; Other High-Level I/O Functions; Open, Close, And Reference Counting; Null And Error Entries In Devtab; Initialization Of The I/O System; ; An Example Device Driver; The Tty Abstraction; Organization Of A Tty Device Driver; Request Queues And Buffers; Synchronization Of Upper Half And Lower Half; Hardware Buffers And Driver Design; Tty Control Block And Data Declarations; Minor Device Numbers; Upper–Half Tty Character Input (ttyGetc); Generalized Upper–Half Tty Input (ttyRead); Upper–Half Tty Character Output (ttyPutc); Starting Output (ttyKickOut); Upper–Half Tty Multiple Character Output (ttyWrite); Lower–Half Tty Driver Function (ttyInterrupt); Output Interrupt Processing (ttyInter_out); Tty Input Processing (ttyInter_in); Tty Control Block Initialization (ttyInit); Device Driver Control; ; DMA Devices and Drivers (Ethernet); Direct Memory Access And Buffers; Multiple Buffers And Rings; An Example Ethernet Driver Using DMA; Device Hardware Definitions And Constants; Rings And Buffers In Memory; Definitions Of An Ethernet Control Block; Device And Driver Initialization; Allocating An Input Buffer; Reading From An Ethernet Device; Writing To An Ethernet Device; Handling Interrupts From An Ethernet Device; Ethernet Control Functions; ; A Minimal Internet Protocol Stack; Required Functionality; Simultaneous Conversations, Timeouts, And Processes; ARP Functions; Definition Of A Network Packet; The Network Input Process; Definition Of The UDP Table; UDP Functions; Internet Control Message Protocol; Dynamic Host Configuration Protocol; ; A Remote Disk Driver; The Disk Abstraction; Operations A Disk Driver Supports; Block Transfer And High-Level I/O Functions; A Remote Disk Paradigm; Semantics Of Disk Operations; Definition Of Driver Data Structures; Driver Initialization (rdsInit); The Upper–Half Open Function (rdsOpen); The Remote Communication Function (rdscomm); The Upper–Half Write Function (rdsWrite); The Upper–Half Read Function (rd
• Edition: Second edition
• Publisher Details: Boca Raton : Chapman & Hall/CRC
• Publication Date: 2015
• Extent: 1 online resource, illustrations (colour)
• Subjects: 005.43; Operating systems (Computers); System design
• Languages: English
• ISBNs: 9781498712453; 9781498712446; 9781498712460
• Related ISBNs: 9781498712439
• Notes: Note: Description based on CIP data; item not viewed.
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