Subject: DFT -- BIST -- Low power -- Fault coverage -- Test sequence length -- Testing time - British Library Electronic Legal Deposit Catalogue-Journal Issues and Articles Search Results

Subject DFT -- BIST -- Low power -- Fault coverage -- Test sequence length -- Testing time

1. A novel two-fold state skip logic Built-In Self-Test scheme for digital circuits. (November 2015)

Authors:: Kavitha, Anbalagan; SasiKumar, Subramanian
Journal:: Computers & electrical engineering
Issue:: Volume 48(2015)
Page Start:: 239
Record Type:: Journal Article
View Content:: Available online (eLD content is only available in our Reading Rooms) ↗

2. A novel two-fold state skip logic Built-In Self-Test scheme for digital circuits. (November 2015)

Authors:: Kavitha, Anbalagan; SasiKumar, Subramanian
Journal:: Computers & electrical engineering
Issue:: Volume 48(2015)
Page Start:: 239
Record Type:: Journal Article
View Content:: Available online (eLD content is only available in our Reading Rooms) ↗