1. A CMOS implementation of controller based all digital phase locked loop (ADPLL). Issue 1 (6th May 2020) Authors: Balikai, Vikas; Kittur, Harish Journal: Circuit world Issue: Volume 47:Issue 1(2021) Page Start: 71 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗