1. Advanced HDL synthesis and SOC prototyping : RTL design using Verilog /: RTL design using Verilog. ([2019]) Authors: Taraate, Vaibbhav Record Type: Book Extent: 1 online resource (319 p.) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Introduction to logic circuits & logic design with Verilog. (2019) Authors: LaMeres, Brock J Record Type: Book Extent: 1 online resource (xvi, 485 pages), illustrations (some color) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Quick start guide to Verilog. ([2019]) Authors: LaMeres, Brock J Record Type: Book Extent: 1 online resource View Content: Available online (eLD content is only available in our Reading Rooms) ↗