1. A high-efficiency, reliable multilevel hardware-accelerated annealer with in-memory spin coupling and complementary read algorithm. (3rd March 2023) Authors: Wang, Yun-Yuan; Lin, Yu-Hsuan; Lee, Dai-Ying; Lu, Cheng-Hsien; Wei, Ming-Liang; Tseng, Po-Hao; Lee, Ming-Hsiu; Hsieh, Kuang-Yeu; Wang, Keh-Chung; Lu, Chih-Yuan Journal: Japanese journal of applied physics Issue: Volume 62:Number SC(2023) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗