1. Hardware and Software Design of FPGA-based PCIe Gen3 interface for APEnet+ network interconnect system. Issue 9 (December 2015) Authors: Ammendola, R.; Biagioni, A.; Frezza, O.; Cicero, F. Lo; Lonardo, A; Martinelli, M.; Paolucci, P. S.; Pastorelli, E.; Rossetti, D.; Simula, F.; Tosoratto, L.; Vicini, P. Journal: Journal of physics Issue: Volume 664:Issue 9(2015) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗