1. Addressing source to drain tunneling in extremely scaled Si-transistors using negative capacitance. (December 2021) Authors: Pandey, Nilesh; Pahwa, Girish; Chauhan, Yogesh Singh Journal: Solid-state electronics Issue: Volume 186(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗