Author/Creator: Manhas, S.K. - British Library Electronic Legal Deposit Catalogue-Journal Issues and Articles Search Results

Author/Creator Manhas, S.K.

1. A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization. (July 2016)

Authors:: Kaur, Baljit; Sharma, Arvind; Alam, Naushad; Manhas, S.K.; Anand, Bulusu
Journal:: Microelectronics journal
Issue:: Volume 53(2016)
Page Start:: 45
Record Type:: Journal Article
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2. An 8 bit, 100 kS/s, switch-capacitor DAC SAR ADC for RFID applications. Issue 6 (June 2015)

Authors:: Joshi, Ashish; Manhas, S.K.; Sharma, Satinder K.; Dasgupta, S.
Journal:: Microelectronics journal
Issue:: Volume 46:Issue 6(2015)
Page Start:: 453
Record Type:: Journal Article
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3. Low power SRAM design for 14 nm GAA Si-nanowire technology. Issue 12 (December 2015)

Authors:: Kaushal, Gaurav; Jeong, H.; Maheshwaram, Satish; Manhas, S.K.; Dasgupta, S.; Jung, S.O.
Journal:: Microelectronics journal
Issue:: Volume 46:Issue 12 Part A (2015)
Page Start:: 1239
Record Type:: Journal Article
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