Author/Creator: Jiang, YuYu - British Library Electronic Legal Deposit Catalogue-Journal Issues and Articles Search Results

Author/Creator Jiang, YuYu

1. A novel low specific on-resistance double-gate LDMOS with multiple buried p-layers in the drift region based on the Silicon-On-Insulator substrate. (January 2016)

Authors:: Chen, Yinhui; Hu, Shengdong; Cheng, Kun; Jiang, YuYu; Luo, Jun; Wang, Jian'an; Tang, Fang; Zhou, Xichuan; Zhou, Jianlin; Gan, Ping
Journal:: Superlattices and microstructures
Issue:: Volume 89(2016)
Page Start:: 59
Record Type:: Journal Article
View Content:: Available online (eLD content is only available in our Reading Rooms) ↗

2. Improving breakdown, conductive, and thermal performances for SOI high voltage LDMOS using a partial compound buried layer. (March 2016)

Authors:: Hu, Shengdong; Luo, Jun; Jiang, YuYu; Cheng, Kun; Chen, Yinhui; Jin, Jingjing; Wang, Jian'an; Zhou, Jianlin; Tang, Fang; Zhou, Xichuan; Gan, Ping
Journal:: Solid-state electronics
Issue:: Volume 117(2016)
Page Start:: 146
Record Type:: Journal Article
View Content:: Available online (eLD content is only available in our Reading Rooms) ↗

3. Improving breakdown, conductive, and thermal performances for SOI high voltage LDMOS using a partial compound buried layer. (March 2016)

Authors:: Hu, Shengdong; Luo, Jun; Jiang, YuYu; Cheng, Kun; Chen, Yinhui; Jin, Jingjing; Wang, Jian'an; Zhou, Jianlin; Tang, Fang; Zhou, Xichuan; Gan, Ping
Journal:: Solid-state electronics
Issue:: Volume 117(2016)
Page Start:: 146
Record Type:: Journal Article
View Content:: Available online (eLD content is only available in our Reading Rooms) ↗