1. Efficient design of 15:4 counter using a novel 5:3 counter for high‐speed multiplication. Issue 1 (9th December 2020) Authors: L., Hemanth Krishna; M., Neeharika; Janjirala, Vishvanath; Veeramachaneni, Sreehari; Mahammad S, Noor Journal: IET computers & digital techniques Issue: Volume 15:Issue 1(2021) Page Start: 12 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗