1. Implementation of Floating‐Point Arithmetic Processing on Content Addressable Memory‐Based Massive‐Parallel SIMD matriX Core. Issue 4 (3rd January 2023) Authors: Kageyama, Kyosuke; Arai, Sota; Hamano, Hajime; Kong, Xiangbo; Koide, Tetsushi; Kumaki, Takeshi Journal: IEEJ transactions on electrical and electronic engineering Issue: Volume 18:Issue 4(2023) Page Start: 546 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗