1. (Invited) Si-Cap-Free Low-DIT SiGe Gate Stack for High-Performance pFETs. (8th September 2020) Authors: Arimura, Hiroaki; Wostyn, Kurt; Ragnarsson, Lars-Åke; Conard, Thierry; Chasin, Adrian; Franco, Jacopo; Mitard, Jerome; Horiguchi, Naoto Journal: ECS transactions Issue: Volume 98:Number 5(2020) Page Start: 377 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. A multi-energy level agnostic approach for defect generation during TDDB stress. (July 2022) Authors: Vici, Andrea; Degraeve, Robin; Kaczer, Ben; Franco, Jacopo; Van Beek, Simon; De Wolf, Ingrid Journal: Solid-state electronics Issue: Volume 193(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. A multi-energy level agnostic simulation approach to defect generation. (October 2021) Authors: Vici, Andrea; Degraeve, Robin; Kaczer, Ben; Franco, Jacopo; Van Beek, Simon; De Wolf, Ingrid Journal: Solid-state electronics Issue: Volume 184(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗