1. An expandable topology with low wiring congestion for silicon interposer‐based network‐on‐chip systems. Issue 12 (13th September 2019) Authors: Dadashi, Sajed; Reshadi, Midia; Reza, Akram; Khademzadeh, Ahmad Journal: Transactions on emerging telecommunications technologies Issue: Volume 30:Issue 12(2019) Page Start: n/a Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗